Characterizing the Effects of Transient Faults on a High-Performance Processor Pipeline
DSN '04 Proceedings of the 2004 International Conference on Dependable Systems and Networks
Negative bias temperature instability in CMOS devices
Microelectronic Engineering - Proceedings of the 14th biennial conference on insulating films on semiconductors
Microelectronic Engineering - Proceedings of the 14th biennial conference on insulating films on semiconductors
Impact of NBTI on SRAM Read Stability and Design for Reliability
ISQED '06 Proceedings of the 7th International Symposium on Quality Electronic Design
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Electronics beyond nano-scale CMOS
Proceedings of the 43rd annual Design Automation Conference
The impact of NBTI on the performance of combinational and sequential circuits
Proceedings of the 44th annual Design Automation Conference
NBTI-aware synthesis of digital circuits
Proceedings of the 44th annual Design Automation Conference
An efficient method to identify critical gates under circuit aging
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Penelope: The NBTI-Aware Processor
Proceedings of the 40th Annual IEEE/ACM International Symposium on Microarchitecture
Combating Aging with the Colt Duty Cycle Equalizer
MICRO '43 Proceedings of the 2010 43rd Annual IEEE/ACM International Symposium on Microarchitecture
Analyzing throughput of power and thermal-constraint multicore processor under NBTI effect
Proceedings of the 21st edition of the great lakes symposium on Great lakes symposium on VLSI
TG-based technique for NBTI degradation and leakage optimization
Proceedings of the 17th IEEE/ACM international symposium on Low-power electronics and design
Early prediction of NBTI effects using RTL source code analysis
Proceedings of the 49th Annual Design Automation Conference
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Degradation of device parameters over the lifetime of a system is emerging as a significant threat to system reliability. Among the aging mechanisms, wearout resulting from NBTI is of particular concern in deep submicron technology generations. To facilitate architectural level aging analysis, a tool capable of evaluating NBTI vulnerabilities early in the design cycle has been developed. The tool includes workload-based temperature and performance degradation analysis across a variety of technologies and operating conditions, revealing a complex interplay between factors influencing NBTI timing degradation.