Godson-3: A Scalable Multicore RISC Processor with x86 Emulation

Authors:
Weiwu Hu;Jian Wang;Xiang Gao;Yunji Chen;Qi Liu;Guojie Li
Affiliations:
Institute of Computing Technology, Chinese Academy of Sciences;Institute of Computing Technology, Chinese Academy of Sciences;Institute of Computing Technology, Chinese Academy of Sciences;Institute of Computing Technology, Chinese Academy of Sciences;Institute of Computing Technology, Chinese Academy of Sciences;Institute of Computing Technology, Chinese Academy of Sciences
Venue:
IEEE Micro
Year:
2009

Citing 0
Cited 15

A multi-FPGA based platform for emulating a 100m-transistor-scale processor with high-speed peripherals (abstract only)

Proceedings of the 18th annual ACM/SIGDA international symposium on Field programmable gate arrays
Efficient binary translation system with low hardware cost

ICCD'09 Proceedings of the 2009 IEEE international conference on Computer design
LReplay: a pending period based deterministic replay scheme

Proceedings of the 37th annual international symposium on Computer architecture
A general method to make multi-clock system deterministic

Proceedings of the Conference on Design, Automation and Test in Europe
Comparing FPGA vs. custom cmos and the impact on processor microarchitecture

Proceedings of the 19th ACM/SIGDA international symposium on Field programmable gate arrays
Towards an adaptable multiple-ISA reconfigurable processor

ARC'11 Proceedings of the 7th international conference on Reconfigurable computing: architectures, tools and applications
Design for testability features of godson-3 multicore microprocessor

Journal of Computer Science and Technology
Harmonia: a transparent, efficient, and harmonious dynamic binary translator targeting the Intel® architecture

Proceedings of the 8th ACM International Conference on Computing Frontiers
Effective and efficient microprocessor design space exploration using unlabeled design configurations

IJCAI'11 Proceedings of the Twenty-Second international joint conference on Artificial Intelligence - Volume Volume Two
An FFT performance model for optimizing general-purpose processor architecture

Journal of Computer Science and Technology - Special issue on Community Analysis and Information Recommendation
Microarchitectural design space exploration made fast

Microprocessors & Microsystems
Deterministic Replay Using Global Clock

ACM Transactions on Architecture and Code Optimization (TACO)
Towards a multiple-ISA embedded system

Journal of Systems Architecture: the EUROMICRO Journal
SPIRE: improving dynamic binary translation through SPC-indexed indirect branch redirecting

Proceedings of the 9th ACM SIGPLAN/SIGOPS international conference on Virtual execution environments
Effective and efficient microprocessor design space exploration using unlabeled design configurations

ACM Transactions on Intelligent Systems and Technology (TIST) - Special Section on Intelligent Mobile Knowledge Discovery and Management Systems and Special Issue on Social Web Mining

Quantified Score

Hi-index	0.00

Visualization

Abstract

The Godson-3 microprocessor aims at high-throughput server applications, high-performance scientific computing, and high-end embedded applications. It offers a scalable network on chip, hardware support for x86 emulation, and a reconfigurable architecture. The four-core Godson-3 chip is fabricated with 65-nm CMOS technology. Eight- and 16-core Godson-3 chips are in development.