Optical lithography stalls X-rays
IEEE Spectrum
Smart-Substrate Multichip-Module Systems
IEEE Design & Test
Journal of Electronic Testing: Theory and Applications - Special issue on multi-chip testing and design for testability
Performance - manufacturability tradeoffs in IC design
Proceedings of the conference on Design, automation and test in Europe
2.5D system integration: a design driven system implementation schema
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
2.5-Dimensional VLSI system integration
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
The yield enhancement of field-programmable gate arrays
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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A manufacturing cost model that describes the relationships among characteristics of modern manufacturing processes, investment costs to achieve these characteristics, and basic IC parameters, including both die size and minimum feature size, is used to explain major trends in the past 20 yr of microelectronics. Results from this model indicate that it is not possible to continue progress in microelectronics through minimizing feature size, that the drive toward larger dies will gain momentum and lead gradually toward wafer-scale integration (WSI), and that manufacturing costs will keep WSI from becoming practical in the immediate future. Active-substrate flip-chip multichip modules (MCMs) are presented as an alternative that may provide both the performance gain and cost efficiency required.