An Online EHW Pattern Recognition System Applied to Face Image Recognition

Authors:
Kyrre Glette;Jim Torresen;Moritoshi Yasunaga
Affiliations:
University of Oslo, Department of Informatics, P.O. Box 1080 Blindern, 0316 Oslo, Norway;University of Oslo, Department of Informatics, P.O. Box 1080 Blindern, 0316 Oslo, Norway;University of Tsukuba, Graduate School of Systems and Information Engineering, 1-1-1 Ten-ou-dai, Tsukuba, Ibaraki, Japan
Venue:
Proceedings of the 2007 EvoWorkshops 2007 on EvoCoMnet, EvoFIN, EvoIASP,EvoINTERACTION, EvoMUSART, EvoSTOC and EvoTransLog: Applications of Evolutionary Computing
Year:
2009

Citing 11
Cited 3

The application of genetic algorithms to the design of reconfigurable reasoning VLSI chips

FPGA '00 Proceedings of the 2000 ACM/SIGDA eighth international symposium on Field programmable gate arrays
Genetic Algorithms in Search, Optimization and Machine Learning

Genetic Algorithms in Search, Optimization and Machine Learning
Promises and Challenges of Evolvable Hardware

ICES '96 Proceedings of the First International Conference on Evolvable Systems: From Biology to Hardware
Genetic Algorithm-Based Methodology for Pattern Recognition Hardware

ICES '00 Proceedings of the Third International Conference on Evolvable Systems: From Biology to Hardware
A Pattern Recognition System Using Evolvable Hardware

PPSN IV Proceedings of the 4th International Conference on Parallel Problem Solving from Nature
Scalable Evolvable Hardware Applied to Road Image Recognition

EH '00 Proceedings of the 2nd NASA/DoD workshop on Evolvable Hardware
Face recognition: A literature survey

ACM Computing Surveys (CSUR)
A Flexible and Efficient Hardware Architecture for Real-Time Face Recognition Based on Eigenface

ISVLSI '05 Proceedings of the IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design
On-Chip Evolution Using a Soft Processor Core Applied to Image Recognition

AHS '06 Proceedings of the first NASA/ESA conference on Adaptive Hardware and Systems
Gene finding using evolvable reasoning hardware

ICES'03 Proceedings of the 5th international conference on Evolvable systems: from biology to hardware
A flexible on-chip evolution system implemented on a xilinx Virtex-II pro device

ICES'05 Proceedings of the 6th international conference on Evolvable Systems: from Biology to Hardware

Coping with resource fluctuations: the run-time reconfigurable functional unit row classifier architecture

ICES'10 Proceedings of the 9th international conference on Evolvable systems: from biology to hardware
Formal verification of candidate solutions for post-synthesis evolutionary optimization in evolvable hardware

Genetic Programming and Evolvable Machines
Computational aesthetic evaluation: automated fitness functions for evolutionary art, design, and music

Proceedings of the 15th annual conference companion on Genetic and evolutionary computation

Quantified Score

Hi-index	0.01

Visualization

Abstract

An evolvable hardware (EHW) architecture for high-speed pattern recognition has been proposed. For a complex face image recognition task, the system demonstrates (in simulation) an accuracy of 96.25% which is better than previously proposed EHW architectures. In contrast to previous approaches, this architecture is designed for online evolution. Incremental evolution and high level modules have been utilized in order to make the evolution feasible.