Recent progress in unconstrained nonlinear optimization without derivatives
Mathematical Programming: Series A and B - Special issue: papers from ismp97, the 16th international symposium on mathematical programming, Lausanne EPFL
Equivalent Waveform Propagation for Static Timing Analysis
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Sensitivity-Based Gate Delay Propagation in Static Timing Analysis
ISQED '05 Proceedings of the 6th International Symposium on Quality of Electronic Design
Accurate delay computation for noisy waveform shapes
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
Driver waveform computation for timing analysis with multiple voltage threshold driver models
Proceedings of the 45th annual Design Automation Conference
Transistor level gate modeling for accurate and fast timing, noise, and power analysis
Proceedings of the 45th annual Design Automation Conference
A "true" electrical cell model for timing, noise, and power grid verification
Proceedings of the 45th annual Design Automation Conference
Challenges in gate level modeling for delay and SI at 65nm and below
Proceedings of the 45th annual Design Automation Conference
Slope propagation in static timing analysis
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
SWAT: simulator for waveform-accurate timing including parameter variations and transistor aging
PATMOS'11 Proceedings of the 21st international conference on Integrated circuit and system design: power and timing modeling, optimization, and simulation
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Static timing analysis of VLSI circuits relies on tabular models of logic gates obtained during library characterization. At characterization time logic gates are simulated at the circuit level with a range of input waveforms (e.g., saturated ramps with different slews) and various output loads. At timing analysis time the same gates are driven by input waveforms that differ from the class of characterization waveforms. This paper proposes a method for mapping the waveforms that arise in static timing analysis to members of the class of waveforms used to characterize gate timing performance during library characterization. The method is based on the moments of the input waveform, which describe concisely the salient features of the waveform. The mapping between the input waveform and the effective characterization waveform is accomplished by positing functional relationships between the input waveform's moments and the parameters of the characterization waveform. The unknown coefficients of this functional relationship are determined by minimizing the worst case error of the output waveform over a representative set of input waveforms and gate loads. The technique requires no change to the library characterization procedure, and minimal change to the static timing tool with little to no additional computational burden on the timer.