Byte-Oriented Error-Correcting Codes for Semiconductor Memory Systems
IEEE Transactions on Computers
Burst Unidirectional Error-Detecting Codes
IEEE Transactions on Computers - The MIT Press scientific computation series
Decoding of DBEC-TBED Reed-Solomon codes
IEEE Transactions on Computers
Acceptable Testing of VLSI Components Which Contain Error Correctors
IEEE Transactions on Computers
Modeling of a Bubble-Memory Organization with Self-Checking Translators to Achieve High Reliability
IEEE Transactions on Computers
Strongly Fault Secure Logic Networks
IEEE Transactions on Computers
Design of Self-Checking MOS-LSI Circuits: Application to a Four-Bit Microprocessor
IEEE Transactions on Computers
Optimal Unidirectional Error Detecting/Correcting Codes
IEEE Transactions on Computers
Single Byte Error Correcting Double Byte Error Detecting Codes for Memory Systems
IEEE Transactions on Computers
SEC-DED Nonbinary Code for Fault-Tolerant Byte-Organized Memory Implemented with Quaternary Logic
IEEE Transactions on Computers
Erasure and Error Decoding for Semiconductor Memories
IEEE Transactions on Computers
A General Class of Maximal Codes ror Computer Applications
IEEE Transactions on Computers
A Double Error-Correction Scheme for Peripheral Systems
IEEE Transactions on Computers
A realistic evaluation of memory hardware errors and software system susceptibility
USENIXATC'10 Proceedings of the 2010 USENIX conference on USENIX annual technical conference
A Class of Odd-Weight-Column SEC-DED-SbED Codes for Memory System Applications
IEEE Transactions on Computers
Towards energy-proportional datacenter memory with mobile DRAM
Proceedings of the 39th Annual International Symposium on Computer Architecture
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A high-speed method is derived for single-symbol error correcting Reed-Solomon and Hamming type codes. A matrix description is used for implementation of the codes, in which single-error correction in the Galoies field 2b corresponds to correcting a block of b bits in a binary field. The resulting codes correct not only single-bit errors but also single clusters of b-adjacent-bit errors.