Self-organization and associative memory: 3rd edition
Self-organization and associative memory: 3rd edition
Design and Implementation of a General Purpose Neural Network Processor
ISNN '07 Proceedings of the 4th international symposium on Neural Networks: Part II--Advances in Neural Networks
Fault Tolerance Improvement through Architecture Change in Artificial Neural Networks
ISICA '08 Proceedings of the 3rd International Symposium on Advances in Computation and Intelligence
Proceedings of the 22nd Annual Symposium on Integrated Circuits and System Design: Chip on the Dunes
The Connex Array™ as a neural network accelerator
CI '07 Proceedings of the Third IASTED International Conference on Computational Intelligence
High-performance reconfigurable hardware architecture for restricted Boltzmann machines
IEEE Transactions on Neural Networks
Logarithmic multiplier in hardware implementation of neural networks
ICANNGA'11 Proceedings of the 10th international conference on Adaptive and natural computing algorithms - Volume Part I
ANGE: automatic neural generator
ICANN'11 Proceedings of the 21st international conference on Artificial neural networks - Volume Part II
A scalable pipelined architecture for real-time computation of MLP-BP neural networks
Microprocessors & Microsystems
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Expert Systems with Applications: An International Journal
A defect-tolerant accelerator for emerging high-performance applications
Proceedings of the 39th Annual International Symposium on Computer Architecture
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
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Artificial neural networks (ANN) became a common solution for a wide variety of problems in many fields, such as control and pattern recognition to name but a few. Many solutions found in these and other ANN fields have reached a hardware implementation phase, either commercial or with prototypes. The most frequent solution for the implementation of ANN consists of training and implementing the ANN within a computer. Nevertheless this solution might be unsuitable because of its cost or its limited speed. The implementation might be too expensive because of the computer and too slow when implemented in software. In both cases dedicated hardware can be an interesting solution. The necessity of dedicated hardware might not imply building the hardware since in the last two decades several commercial hardware solutions that can be used in the implementation have reached the market. Unfortunately not every integrated circuit will fit the needs: some will use lower precision, some will implement only certain types of networks, some don't have training built in and the information is not easy to find. This article is confined to reporting the commercial chips that have been developed specifically for ANN, leaving out other solutions. This option has been made because most of the other solutions are based on cards which are built either with these chips, Digital Signal Processors or Reduced Instruction Set Computers.