Neural Networks: A Comprehensive Foundation
Neural Networks: A Comprehensive Foundation
Finite Precision Error Analysis of Neural Network Hardware Implementations
IEEE Transactions on Computers
Circuit Design with VHDL
Improving Accuracy in Mitchell's Logarithmic Multiplication Using Operand Decomposition
IEEE Transactions on Computers
Statistical Comparisons of Classifiers over Multiple Data Sets
The Journal of Machine Learning Research
A support vector machine with integer parameters
Neurocomputing
Artificial neural networks: a review of commercial hardware
Engineering Applications of Artificial Intelligence
Truncated binary multipliers with variable correction and minimum mean square error
IEEE Transactions on Circuits and Systems Part I: Regular Papers
An iterative logarithmic multiplier
Microprocessors & Microsystems
Logarithmic multiplier in hardware implementation of neural networks
ICANNGA'11 Proceedings of the 10th international conference on Adaptive and natural computing algorithms - Volume Part I
An approximate logarithmic squaring circuit with error compensation for DSP applications
Microelectronics Journal
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In recent years there has been a growing interest in hardware neural networks, which express many benefits over conventional software models, mainly in applications where speed, cost, reliability, or energy efficiency are of great importance. These hardware neural networks require many resource-, power- and time-consuming multiplication operations, thus special care must be taken during their design. Since the neural network processing can be performed in parallel, there is usually a requirement for designs with as many concurrent multiplication circuits as possible. One option to achieve this goal is to replace the complex exact multiplying circuits with simpler, approximate ones. The present work demonstrates the application of approximate multiplying circuits in the design of a feed-forward neural network model with on-chip learning ability. The experiments performed on a heterogeneous Proben1 benchmark dataset show that the adaptive nature of the neural network model successfully compensates for the calculation errors of the approximate multiplying circuits. At the same time, the proposed designs also profit from more computing power and increased energy efficiency.