Design and implementation of cost-effective probabilistic-based noise-tolerant VLSI circuits

  • Authors:
  • I-Chyn Wey;You-Gang Chen;Chang-Hong Yu;An-Yeu AndyWu;Jie Chen

  • Affiliations:
  • Department of Electrical Engineering, Chang Gung University, Taoyuan, Taiwan;Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan;College of Information and Communication Engineering, Zhejiang Gongshang University, Hangzhou, China;Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan;National Institute for Nanotechnology, Ottawa, ON, Canada and Department of Electrical and Computer Engineering and Department of Biomedical Engineering, University of Alberta, Edmonton, AB, Canad ...

  • Venue:
  • IEEE Transactions on Circuits and Systems Part I: Regular Papers
  • Year:
  • 2009

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Abstract

As the size of CMOS devices is scaled down to nanometers, noise can significantly affect circuit performance. Because noise is random and dynamic in nature, a probabilistic-based approach is better suited to handle these types of errors compared with conventional CMOS designs. In this paper, we propose a cost-effective probabilistic-based noise-tolerant circuit-design methodology. Our cost-effective method is based on master-and-slave Markov random field (MRF) mapping and master-and-slave MRF logic-gate construction. The resulting probabilistic-based MRF circuit trades hardware cost for circuit reliability. To demonstrate a noise-tolerant performance, an 8-bit MRF carry-lookahead adder (MRF_CLA) was implemented using the 0.13-µm CMOS process technology. The chip measurement results show that the proposed master-and-slave MRF_CLA can provide a 7.00 × 10-5 bit-error rate (BER) under 10.6-dB signal-to-noise ratio, while the conventional CMOS_CLA can only provide 8.84 × 10-3 BER. Because of high noise immunity, the master-and-slave MRF_CLA can operate under 0.25 V to tolerate noise interference with only 1.9 µW/MHz of energy consumption. Moreover, the transistor count can be reduced by 42% as compared with the direct-mapping MRF_CLA design [1].