Ray tracing on programmable graphics hardware
Proceedings of the 29th annual conference on Computer graphics and interactive techniques
Fundamentals of Codes, Graphs, and Iterative Decoding
Fundamentals of Codes, Graphs, and Iterative Decoding
Linear algebra operators for GPU implementation of numerical algorithms
ACM SIGGRAPH 2003 Papers
Sparse matrix solvers on the GPU: conjugate gradients and multigrid
ACM SIGGRAPH 2003 Papers
Error Control Coding, Second Edition
Error Control Coding, Second Edition
Fast computation of database operations using graphics processors
SIGMOD '04 Proceedings of the 2004 ACM SIGMOD international conference on Management of data
Brook for GPUs: stream computing on graphics hardware
ACM SIGGRAPH 2004 Papers
Fast and approximate stream mining of quantiles and frequencies using graphics processors
Proceedings of the 2005 ACM SIGMOD international conference on Management of data
Computation on Programmable Graphics Hardware
IEEE Computer Graphics and Applications
Interconnection framework for high-throughput, flexible LDPC decoders
Proceedings of the conference on Design, automation and test in Europe: Designers' forum
Fast fluid dynamics simulation on the GPU
SIGGRAPH '05 ACM SIGGRAPH 2005 Courses
Proceedings of the 4th international conference on Computing frontiers
Evolutionary Computing on Consumer Graphics Hardware
IEEE Intelligent Systems
Joint (3,k)-regular LDPC code and decoder/encoder design
IEEE Transactions on Signal Processing
Memory Access Optimized Implementation of Cyclic and Quasi-Cyclic LDPC Codes on a GPGPU
Journal of Signal Processing Systems
Optimizing linpack benchmark on GPU-accelerated petascale supercomputer
Journal of Computer Science and Technology - Special issue on Community Analysis and Information Recommendation
GPU-like on-chip system for decoding LDPC codes
ACM Transactions on Embedded Computing Systems (TECS)
Hi-index | 0.00 |
Low-Density Parity-Check (LDPC) codes are powerful error correcting codes adopted by recent communication standards. LDPC decoders are based on belief propagation algorithms, which make use of a Tanner graph and very intensive message-passing computation, and usually require hardware-based dedicated solutions. With the exponential increase of the computational power of commodity graphics processing units (GPUs), new opportunities have arisen to develop general purpose processing on GPUs. This paper proposes the use of GPUs for implementing flexible and programmable LDPC decoders. A new stream-based approach is proposed, based on compact data structures to represent the Tanner graph. It is shown that such a challenging application for stream-based computing, because of irregular memory access patterns, memory bandwidth and recursive flow control constraints, can be efficiently implemented on GPUs. The proposal was experimentally evaluated by programming LDPC decoders on GPUs using the Caravela platform, a generic interface tool for managing the kernels' execution regardless of the GPU manufacturer and operating system. Moreover, to relatively assess the obtained results, we have also implemented LDPC decoders on general purpose processors with Streaming Single Instruction Multiple Data (SIMlD) Extensions. Experimental results show that the solution proposed here efficiently decodes several codewords simultaneously, reducing the processing time by one order of magnitude.