Ray tracing on programmable graphics hardware

  • Authors:

  • Timothy J. Purcell;Ian Buck;William R. Mark;Pat Hanrahan

  • Affiliations:

  • Stanford University;Stanford University;Stanford University and NVIDIA Corporation;Stanford University

  • Venue:
  • Proceedings of the 29th annual conference on Computer graphics and interactive techniques
  • Year:
  • 2002

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Abstract

Recently a breakthrough has occurred in graphics hardware: fixed function pipelines have been replaced with programmable vertex and fragment processors. In the near future, the graphics pipeline is likely to evolve into a general programmable stream processor capable of more than simply feed-forward triangle rendering.In this paper, we evaluate these trends in programmability of the graphics pipeline and explain how ray tracing can be mapped to graphics hardware. Using our simulator, we analyze the performance of a ray casting implementation on next generation programmable graphics hardware. In addition, we compare the performance difference between non-branching programmable hardware using a multipass implementation and an architecture that supports branching. We also show how this approach is applicable to other ray tracing algorithms such as Whitted ray tracing, path tracing, and hybrid rendering algorithms. Finally, we demonstrate that ray tracing on graphics hardware could prove to be faster than CPU based implementations as well as competitive with traditional hardware accelerated feed-forward triangle rendering.