An efficient ray-polygon intersection
Graphics gems
OBBTree: a hierarchical structure for rapid interference detection
SIGGRAPH '96 Proceedings of the 23rd annual conference on Computer graphics and interactive techniques
Fast, minimum storage ray-triangle intersection
Journal of Graphics Tools
Ray tracing on programmable graphics hardware
Proceedings of the 29th annual conference on Computer graphics and interactive techniques
SaarCOR: a hardware architecture for ray tracing
Proceedings of the ACM SIGGRAPH/EUROGRAPHICS conference on Graphics hardware
Collision Detection for Interactive Graphics Applications
IEEE Transactions on Visualization and Computer Graphics
Efficient Collision Detection Using Bounding Volume Hierarchies of k-DOPs
IEEE Transactions on Visualization and Computer Graphics
Path tracing using the AR350 processor
Proceedings of the 2nd international conference on Computer graphics and interactive techniques in Australasia and South East Asia
Hardware Accelerated Collision Detection - An Architecture and Simulation Results
Proceedings of the conference on Design, Automation and Test in Europe - Volume 3
Real-Time Collision Detection (The Morgan Kaufmann Series in Interactive 3-D Technology) (The Morgan Kaufmann Series in Interactive 3D Technology)
Stream-Mode FPGA acceleration of complex pattern trajectory querying
SSTD'13 Proceedings of the 13th international conference on Advances in Spatial and Temporal Databases
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We present a novel FPGA-accelerated architecture for fast collision detection among rigid bodies. This paper describes the design of the hardware architecture for several primitive intersection testing components implemented on a multi-FPGA Xilinx Virtex-II prototyping system. We focus on the acceleration of ray-triangle intersection operation which is the one of the most important operations in various applications such as collision detection and ray tracing. Our implementation result is a hardware-accelerated ray-triangle intersection engine that is capable of out-performing a 2.8 GHz Xeon processor, running a well-known high performance software ray-triangle intersection algorithm, by up to a factor of seventy. In addition, we demonstrate that the proposed approach could prove to be faster than current GPU-based algorithms as well as CPU based algorithms for ray-triangle intersection.