Principles of CMOS VLSI design: a systems perspective
Principles of CMOS VLSI design: a systems perspective
Bit-Serial Systolic Divider and Multiplier for Finite Fields GF(2/sup m/)
IEEE Transactions on Computers - Special issue on computer arithmetic
Algorithmic number theory
The art of computer programming, volume 2 (3rd ed.): seminumerical algorithms
The art of computer programming, volume 2 (3rd ed.): seminumerical algorithms
Handbook of Applied Cryptography
Handbook of Applied Cryptography
Elliptic Curve Public Key Cryptosystems
Elliptic Curve Public Key Cryptosystems
On Computing Multiplicative Inverses in GF(2/sup m/)
IEEE Transactions on Computers
IEEE Transactions on Circuits and Systems II: Express Briefs
Low area - scalable hardware/software co-design for elliptic curve cryptography
NTMS'09 Proceedings of the 3rd international conference on New technologies, mobility and security
A novel arithmetic unit over GF(2m) for low cost cryptographic applications
HPCC'05 Proceedings of the First international conference on High Performance Computing and Communications
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Division over a finite field GF(2m) is the most time and area consuming operation. In this paper, A new division architecture for GF(2m) using the standard basis representation is proposed. Based on a modified version of the binary extended greatest common divisor (GCD) algorithm, we design a compact and fast divider. The proposed divider can produce division results at a rate of one per 2m - 1 clock cycles. Analysis shows that the computational delay time of the proposed architecture is significantly less than previously proposed dividers with reduced transistor counts. Furthermore, since the new architecture does not restrict the choice of irreducible polynomials and has the features of regularity and modularity, it provides a high flexibility and scalability with respect to the field size m.