Route packets, not wires: on-chip inteconnection networks
Proceedings of the 38th annual Design Automation Conference
A design methodology for application-specific networks-on-chip
ACM Transactions on Embedded Computing Systems (TECS)
Leveraging Optical Technology in Future Bus-based Chip Multiprocessors
Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture
Corona: System Implications of Emerging Nanophotonic Technology
ISCA '08 Proceedings of the 35th Annual International Symposium on Computer Architecture
Photonic Networks-on-Chip for Future Generations of Chip Multiprocessors
IEEE Transactions on Computers
Building Manycore Processor-to-DRAM Networks with Monolithic Silicon Photonics
HOTI '08 Proceedings of the 2008 16th IEEE Symposium on High Performance Interconnects
Phastlane: a rapid transit optical routing network
Proceedings of the 36th annual international symposium on Computer architecture
A Hierarchical Hybrid Optical-Electronic Network-on-Chip
ISVLSI '10 Proceedings of the 2010 IEEE Annual Symposium on VLSI
A low-power fat tree-based optical network-on-chip for multiprocessor system-on-chip
Proceedings of the Conference on Design, Automation and Test in Europe
A hybrid packet-circuit switched router for optical network on chip
Computers and Electrical Engineering
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As modern computing systems become increasingly complex, communication efficiency among and inside chips has become as important as the computation speeds of individual processor cores. Traditionally, inter-chip and intra-chip communication architectures are separately designed to maximize design flexibility under different constraints. However, jointly designing communication architectures for both inter-chip and intra-chip communication could potentially yield better solutions. In this paper, we present a unified inter/intra-chip optical network, called UNION, for chip multiprocessors (CMP). UNION is based on recent progress in nano-photonic technologies. It connects not only processors on a single CMP but also multiple CMPs in a system. UNION employs a hierarchical optical network to separate inter-chip communication traffic from intra-chip communication traffic. It fully utilizes a single optical network to transmit both payload packets and control packets. The network controller on each CMP not only manages intra-chip communications but also collaborate with each other to facilitate inter-chip communications. We compared CMPs using UNION with those using a matched electronic counterpart in 45 nm process. Based on eight applications, simulation results show that on average UNION improves CMP performance by 3.1X while reducing 92% of network energy consumption and 52% of communication delay.