Automated design of misaligned-carbon-nanotube-immune circuits
Proceedings of the 44th annual Design Automation Conference
Programmable logic circuits based on ambipolar CNFET
Proceedings of the 45th annual Design Automation Conference
Novel library of logic gates with ambipolar CNTFETs: opportunities for multi-level logic synthesis
Proceedings of the Conference on Design, Automation and Test in Europe
Fine-grain reconfigurable logic cells based on double-gate CNTFETs
Proceedings of the 21st edition of the great lakes symposium on Great lakes symposium on VLSI
Universal logic modules based on double-gate carbon nanotube transistors
Proceedings of the 48th Design Automation Conference
Ambipolar double-gate FET binary-decision- diagram (Am-BDD) for reconfigurable logic cells
NANOARCH '11 Proceedings of the 2011 IEEE/ACM International Symposium on Nanoscale Architectures
Ambipolar double-gate FETs for the design of compact logic structures
Proceedings of the great lakes symposium on VLSI
| Hi-index | 0.00 |
This paper presents a set of circuit design approaches to achieve clocked standard logic cell functions with ambipolar double-gate devices such as the Double Gate Carbon Nanotube FET (DG-CNTFET). The cells presented in this work use the infield controllability of the device to reduce transistor count over conventional standard cells by only requiring n+1 transistors (where n is the fan-in), and achieve improved time delay by a factor of 2 for comparable power consumption.