Whirlpool PLAs: a regular logic structure and their synthesis
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Novel CNTFET-based reconfigurable logic gate design
Proceedings of the 44th annual Design Automation Conference
Automated design of misaligned-carbon-nanotube-immune circuits
Proceedings of the 44th annual Design Automation Conference
Input Variable Assignment and Output Phase Optimization of PLA's
IEEE Transactions on Computers
Reducing transistor count in clocked standard cells with ambipolar double-gate FETs
Proceedings of the 2010 IEEE/ACM International Symposium on Nanoscale Architectures
Power consumption of logic circuits in ambipolar carbon nanotube technology
Proceedings of the Conference on Design, Automation and Test in Europe
Novel library of logic gates with ambipolar CNTFETs: opportunities for multi-level logic synthesis
Proceedings of the Conference on Design, Automation and Test in Europe
Universal logic modules based on double-gate carbon nanotube transistors
Proceedings of the 48th Design Automation Conference
Physical synthesis onto a Sea-of-Tiles with double-gate silicon nanowire transistors
Proceedings of the 49th Annual Design Automation Conference
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Recently, it was demonstrated that the polarity of carbon nanotube field effect transistors can be electrically controlled. In this paper we show how Programmable Logic Arrays (PLA) can be built out of these devices, and we illustrate how they outperform usual PLA by internal signal inversion. The simulations show an area saving up to ~ 21% and decrease of the delay in PLA-based FPGA by 50%. We also show that this architecture is suitable for high-performance design tools and defect-tolerance approaches.