An efficient phase detector connection structure for the skew synchronization system

Authors:
Yu-Chien Kao;Hsuan-Ming Chou;Kun-Ting Tsai;Shih-Chieh Chang
Affiliations:
National Tsing Hua University, HsinChu, Taiwan;National Tsing Hua University, HsinChu, Taiwan;National Tsing Hua University, HsinChu, Taiwan;National Tsing Hua University, HsinChu, Taiwan
Venue:
Proceedings of the 47th Design Automation Conference
Year:
2010

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Abstract

Clock skew optimization continues to be an important concern in circuit designs. To overcome the influence caused by PVT variations, the automatic skew synchronization scheme can dynamically adjust and reduce the clock skew after a chip is manufactured. There are two key components in the skew synchronization scheme: Adjustable Delay Buffer (ADB) and Phase Detector (PD). Most previous researchers have emphasized on ADB placement issues. In this paper, we show that the connection between FFs and PDs can also greatly influence the final clock skew due to the insertion of the PDs. We first analyze the influence of PD connection structures. Then we propose an algorithm to generate a PD connection structure which achieves the minimum influence to the clock skew. Our experimental results are very encouraging.