Stochastic versus possibilistic programming
Fuzzy Sets and Systems
Statistical Timing Analysis of Combinational Circuits
ICCD '92 Proceedings of the 1991 IEEE International Conference on Computer Design on VLSI in Computer & Processors
Variational delay metrics for interconnect timing analysis
Proceedings of the 41st annual Design Automation Conference
An approach to placement-coupled logic replication
Proceedings of the 41st annual Design Automation Conference
A New Statistical Optimization Algorithm for Gate Sizing
ICCD '04 Proceedings of the IEEE International Conference on Computer Design
A New Method for Design of Robust Digital Circuits
ISQED '05 Proceedings of the 6th International Symposium on Quality of Electronic Design
Robust gate sizing by geometric programming
Proceedings of the 42nd annual Design Automation Conference
How accurately can we model timing in a placement engine?
Proceedings of the 42nd annual Design Automation Conference
Variation Aware Placement for FPGAs
ISVLSI '06 Proceedings of the IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures
A new LP based incremental timing driven placement for high performance designs
Proceedings of the 43rd annual Design Automation Conference
Variation Aware Timing Based Placement Using Fuzzy Programming
ISQED '07 Proceedings of the 8th International Symposium on Quality Electronic Design
A fuzzy optimization approach for variation aware power minimization during gate sizing
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
| Hi-index | 0.00 |
In the nanometer regime, the effects of variations are having an increasing impact on the delay, power, and yield characteristics of devices. In this paper, we propose the use of fuzzy and stochastic mathematical programming techniques for variation aware timing-based incremental placement. The uncertainty due to process variations in these techniques, are modeled using fuzzy numbers and probabilistic constraints, respectively. The objective is to minimize the critical path delay of the circuit in the presence of variations considering gate and interconnect delays. In the fuzzy approach, the average and worst case deterministic optimizations are performed to identify the bounds and convert the uncertain fuzzy problem into a crisp nonlinear problem. The stochastic optimization framework, on the other hand, transforms the probabilistic constraints into a second-order conic program (SOCP) with explicit mean and variance values. The fuzzy and stochastic approaches tested on ITC'99 benchmark circuits yielded around 12.60% and 10.53% improvements in timing, when compared to optimization with the worst case process variations setting.