Variational delay metrics for interconnect timing analysis

Authors:
Kanak Agarwal;Dennis Sylvester;David Blaauw;Frank Liu;Sani Nassif;Sarma Vrudhula
Affiliations:
University of Michigan, Ann Arbor, MI;University of Michigan, Ann Arbor, MI;University of Michigan, Ann Arbor, MI;IBM Research, Austin, TX;IBM Research, Austin, TX;University of Arizona, Tucson, AZ
Venue:
Proceedings of the 41st annual Design Automation Conference
Year:
2004

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Abstract

In this paper we develop an approach to model interconnect delay under process variability for timing analysis and physical design optimization. The technique allows for closed-form computation of interconnect delay probability density functions (PDFs) given variations in relevant process parameters such as linewidth, metal thickness, and dielectric thickness. We express the resistance and capacitance of a line as a linear function of random variables and then use these to compute circuit moments. Finally, these variability-aware moments are used in known closed-form delay metrics to compute interconnect delay PDFs. We compare the approach to SPICE based Monte Carlo simulations and report an error in mean and standard deviation of delay of 1% and 4% on average, respectively.