Numerical recipes in C (2nd ed.): the art of scientific computing
Numerical recipes in C (2nd ed.): the art of scientific computing
An explicit RC-circuit delay approximation based on the first three moments of the impulse response
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Timing metrics for physical design of deep submicron technologies
ISPD '98 Proceedings of the 1998 international symposium on Physical design
PRIMO: probability interpretation of moments for delay calculation
DAC '98 Proceedings of the 35th annual Design Automation Conference
h-gamma: an RC delay metric based on a gamma distribution approximation of the homogeneous response
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
The Elmore delay as a bound for RC trees with generalized input signals
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
An analytical delay model for RLC interconnects
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
RC delay metrics for performance optimization
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
PERI: a technique for extending delay and slew metrics to ramp inputs
Proceedings of the 8th ACM/IEEE international workshop on Timing issues in the specification and synthesis of digital systems
Closed form expressions for extending step delay and slew metrics to ramp inputs
Proceedings of the 2003 international symposium on Physical design
Delay and slew metrics using the lognormal distribution
Proceedings of the 40th annual Design Automation Conference
Simple metrics for slew rate of RC circuits based on two circuit moments
Proceedings of the 40th annual Design Automation Conference
Variational delay metrics for interconnect timing analysis
Proceedings of the 41st annual Design Automation Conference
Weibull Based Analytical Waveform Model
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Analytic Modeling of Interconnects for Deep Sub-Micron Circuits
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Fitted Elmore delay: a simple and accurate interconnect delay model
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Interconnect Delay and Slew Metrics Using the First Three Moments
ISQED '05 Proceedings of the 6th International Symposium on Quality of Electronic Design
GLSVLSI '05 Proceedings of the 15th ACM Great Lakes symposium on VLSI
Piece-wise approximations of RLCK circuit responses using moment matching
Proceedings of the 42nd annual Design Automation Conference
Computation of signal threshold crossing times directly from higher order moments
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Robust analytical gate delay modeling for low voltage circuits
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
Statistical modeling of cross-coupling effects in VLSI interconnects
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Statistical clock tree routing for robustness to process variations
Proceedings of the 2006 international symposium on Physical design
Variational Interconnect Delay Metrics for Statistical Timing Analysis
ISQED '06 Proceedings of the 7th International Symposium on Quality Electronic Design
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
Efficient computation of current flow in signal wires for reliability analysis
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
An accurate slew metric for on-chip VLSI interconnect using Weibull distribution function
Proceedings of the International Conference on Advances in Computing, Communication and Control
Fast interconnect and gate timing analysis for performance optimization
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Closed-form solution for timing analysis of process variations on SWCNT interconnect
Proceedings of the 11th international workshop on System level interconnect prediction
Interconnect delay and slew metrics using the beta distribution
Proceedings of the Conference on Design, Automation and Test in Europe
Fast waveform estimation (FWE) for timing analysis
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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Physical design optimizations such as placement, interconnect synthesis, oorplanning, and routing require fast and accurate analysis of RC networks. Because of its simple close form and fast evaluation, the Elmore delay metric has been widely adopted. The recently proposed delay metrics PRIMO and H-gamma match the rst three circuit moments to the probability density function of a Gamma statistical distribution. Although these methods demonstrate impressive accuracy compared to other delay metrics, their implementations tend to be challenging. As an alternative to matching to the Gamma distribution, we propose to match the rst two circuit moments to a Weibull distribution. The result is a new delay metric called Weibull based Delay (WED). The primary advantages of WED over PRIMO and H-gamma are its efciency and ease of implementation. Experiments show that WED is robust and has satisfactory accuracies at both near and far-end nodes.