RICE: Rapid interconnect circuit evaluator
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
An explicit RC-circuit delay approximation based on the first three moments of the impulse response
DAC '96 Proceedings of the 33rd annual Design Automation Conference
h-gamma: an RC delay metric based on a gamma distribution approximation of the homogeneous response
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
A two moment RC delay metric for performance optimization
ISPD '00 Proceedings of the 2000 international symposium on Physical design
Effects of inductance on the propagation delay and repeater insertion in VLSI circuits
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
PERI: a technique for extending delay and slew metrics to ramp inputs
Proceedings of the 8th ACM/IEEE international workshop on Timing issues in the specification and synthesis of digital systems
An "effective" capacitance based delay metric for RC interconnect
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
A delay metric for RC circuits based on the Weibull distribution
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Delay and slew metrics using the lognormal distribution
Proceedings of the 40th annual Design Automation Conference
Simple metrics for slew rate of RC circuits based on two circuit moments
Proceedings of the 40th annual Design Automation Conference
PRIMA: passive reduced-order interconnect macromodeling algorithm
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Efficient linear circuit analysis by Pade approximation via the Lanczos process
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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Capturing RLCK circuit responses accurately with existing model order reduction (MOR) techniques is very expensive. Direct metrics for fast analysis of RC circuits exist but there is no such technique for RLCK circuits. This paper introduces a new family of MOR techniques based on piece-wise functions to capture RLCK circuit responses accurately using only four or five moments. The time-domain response is approximated using a piece-wise function whose pieces are simple polynomials. The proposed method is fast and guaranteed stable and it avoids the calculation of poles and residues associated with existing model order reduction techniques. Results for many different industrial netlists indicate that delay and transition time can be captured within 5% error using only four moments. To the authors' knowledge, there is no existing method that can extract as much information about RLCK circuits with only four or five moments.