An explicit RC-circuit delay approximation based on the first three moments of the impulse response

Accurate and efficient macromodel of submicron digital standard cells

DAC '97 Proceedings of the 34th annual Design Automation Conference

Timing metrics for physical design of deep submicron technologies

ISPD '98 Proceedings of the 1998 international symposium on Physical design

PRIMO: probability interpretation of moments for delay calculation

DAC '98 Proceedings of the 35th annual Design Automation Conference

h-gamma: an RC delay metric based on a gamma distribution approximation of the homogeneous response

Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design

Crosstalk constrained global route embedding

ISPD '99 Proceedings of the 1999 international symposium on Physical design

Buffer insertion with accurate gate and interconnect delay computation

Proceedings of the 36th annual ACM/IEEE Design Automation Conference

A two moment RC delay metric for performance optimization

ISPD '00 Proceedings of the 2000 international symposium on Physical design

Wire-sizing for delay minimization and ringing control using transmission line model

DATE '00 Proceedings of the conference on Design, automation and test in Europe

MCM interconnect design using two-pole approximation

Proceedings of the conference on Design, automation and test in Europe

An analytic calculation method for delay time of RC-class interconnects

ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference

A fast and accurate delay estimation method for buffered interconnects

Proceedings of the 2001 Asia and South Pacific Design Automation Conference

Fast and accurate wire delay estimation for physical synthesis of large ASICs

Proceedings of the 12th ACM Great Lakes symposium on VLSI

PERI: a technique for extending delay and slew metrics to ramp inputs

Proceedings of the 8th ACM/IEEE international workshop on Timing issues in the specification and synthesis of digital systems

Reduced Order Modeling for RLC Interconnect Tree Using Hurwitz Polynomial

Analog Integrated Circuits and Signal Processing

An "effective" capacitance based delay metric for RC interconnect

Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design

Closed form expressions for extending step delay and slew metrics to ramp inputs

Proceedings of the 2003 international symposium on Physical design

A delay metric for RC circuits based on the Weibull distribution

Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design

Delay and slew metrics using the lognormal distribution

Proceedings of the 40th annual Design Automation Conference

Simple metrics for slew rate of RC circuits based on two circuit moments

Proceedings of the 40th annual Design Automation Conference

Signal Delay in Coupled, Distributed RC Lines in the Presence of Temporal Proximity

ARVLSI '97 Proceedings of the 17th Conference on Advanced Research in VLSI (ARVLSI '97)

Delay Models for MCM Interconnects when Response is Non-Monotone

MCMC '97 Proceedings of the 1997 Conference on IEEE Multi-Chip Module Conference

Efficient Delay Calculation in Presence of Crosstalk

ISQED '00 Proceedings of the 1st International Symposium on Quality of Electronic Design

Analytic Modeling of Interconnects for Deep Sub-Micron Circuits

Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design

Fitted Elmore delay: a simple and accurate interconnect delay model

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

An Interconnect Insensitive Linear Time-Varying Driver Model for Static Timing Analysis

ISQED '05 Proceedings of the 6th International Symposium on Quality of Electronic Design

VITA: variation-aware interconnect timing analysis for symmetric and skewed sources of variation considering variational ramp input

GLSVLSI '05 Proceedings of the 15th ACM Great Lakes symposium on VLSI

Piece-wise approximations of RLCK circuit responses using moment matching

Proceedings of the 42nd annual Design Automation Conference

Computation of signal threshold crossing times directly from higher order moments

Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design

Robust analytical gate delay modeling for low voltage circuits

ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference

A fast and accurate method for interconnect current calculation

ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference

Design and verification of high-speed VLSI physical design

Journal of Computer Science and Technology

Interconnect delay and slew metrics using the beta distribution

Proceedings of the Conference on Design, Automation and Test in Europe

An improved Elmore delay model for VLSI interconnects

Mathematical and Computer Modelling: An International Journal

An efficient method for analyzing on-chip thermal reliability considering process variations

ACM Transactions on Design Automation of Electronic Systems (TODAES)