Wire segmenting for improved buffer insertion
DAC '97 Proceedings of the 34th annual Design Automation Conference
A graph based algorithm for optimal buffer insertion under accurate delay models
Proceedings of the conference on Design, automation and test in Europe
Parameter variations and impact on circuits and microarchitecture
Proceedings of the 40th annual Design Automation Conference
Variational delay metrics for interconnect timing analysis
Proceedings of the 41st annual Design Automation Conference
A Probabilistic Approach to Buffer Insertion
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Fast buffer insertion considering process variations
Proceedings of the 2006 international symposium on Physical design
Information theoretic approach to address delay and reliability in long on-chip interconnects
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Fast min-cost buffer insertion under process variations
Proceedings of the 44th annual Design Automation Conference
Synergistic physical synthesis for manufacturability and variability in 45nm designs and beyond
Proceedings of the 2008 Asia and South Pacific Design Automation Conference
A practical repeater insertion flow
Proceedings of the 18th ACM Great Lakes symposium on VLSI
Data handling limits of on-chip interconnects
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
A new physical routing approach for robust bundled signaling on NoC links
Proceedings of the 20th symposium on Great lakes symposium on VLSI
Hi-index | 0.00 |
This paper considers the buffer insertion problem under process variations. With continued technology scaling, it is necessary to model the physical parameters to be random variables. One approach to the buffer insertion problem under variations is to use the mean values of these parameters and solve the problem using traditional buffer insertion techniques for delay minimization. Another approach is to find a buffer insertion solution using a new method that can handle the probability distributions. Thus, the performance can be optimized with some yield constraint. In this paper, we present both analytical and experimental results to show that the two approaches give almost identical solutions. In other words, the more expensive statistical methods are not needed for the buffer insertion in delay minimization problem.