IDDQ testing as a component of a test suite: the need for several fault coverage metrics
Journal of Electronic Testing: Theory and Applications - Special issue on IDDQ testing of VLSI circuits
IDDQ testing in CMOS digital ASICs
Journal of Electronic Testing: Theory and Applications - Special issue on IDDQ testing of VLSI circuits
The Test Access Port and Boundary-Scan Architecture
The Test Access Port and Boundary-Scan Architecture
Development of a CLASS 1 QTAG Monitor
Proceedings of the IEEE International Test Conference on TEST: The Next 25 Years
The Effectiveness of IDDQ, Functional and Scan Tests: How Many Fault Coverages Do We Need?
Proceedings of the IEEE International Test Conference on Discover the New World of Test and Design
A General Purpose IDDQ Measurement Circuit
Proceedings of the IEEE International Test Conference on Designing, Testing, and Diagnostics - Join Them
QTAG: A Standard for Test Fixture Based IDDQ/ISSQ Monitors
Proceedings of the IEEE International Test Conference on TEST: The Next 25 Years
Physical Versus Logical Fault Models MOS LSI Circuits: Impact on Their Testability
IEEE Transactions on Computers
Role mining in the presence of noise
DBSec'10 Proceedings of the 24th annual IFIP WG 11.3 working conference on Data and applications security and privacy
Automating security configuration and administration: an access control perspective
IWSEC'10 Proceedings of the 5th international conference on Advances in information and computer security
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The Quality Test Action Group (QTAG) was formed at the 1993 International Test Conference to define a standard for test fixture based off-chip quiescent current monitors for use in the production testing of CMOS Integrated Circuits. These quiescent current monitors will provide the IDDQ/ISSQ test instrumentation that is needed by the semiconductor industry. This paper proposes a standard serial interface to be used by ATE systems to communicate with the QTAG quiescent current monitors.