Physical Versus Logical Fault Models MOS LSI Circuits: Impact on Their Testability

  • Authors:
  • J. Galiay;Y. Crouzet;M. Vergniault

  • Affiliations:
  • Société pour l'Etude et la Fabrication de Circuits Intégrés Spéciaux (EFCIS);-;-

  • Venue:
  • IEEE Transactions on Computers
  • Year:
  • 1980

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Abstract

At the end of an IC production line, integrated circuits are generally submitted to three kinds of tests: 1) parametric tests to check electrical characteristics (voltage, current, power consumption), 2) dynamic tests to check response times under nominal operating conditions, and 3) functional tests to check its logical behavior.