A New Theory of Deadlock-Free Adaptive Routing in Wormhole Networks
IEEE Transactions on Parallel and Distributed Systems
Interconnection Networks: An Engineering Approach
Interconnection Networks: An Engineering Approach
IPDPS '02 Proceedings of the 16th International Parallel and Distributed Processing Symposium
Dynamic Voltage Scaling with Links for Power Optimization of Interconnection Networks
HPCA '03 Proceedings of the 9th International Symposium on High-Performance Computer Architecture
Energy optimization techniques in cluster interconnects
Proceedings of the 2003 international symposium on Low power electronics and design
Design-Space Exploration of Power-Aware On/Off Interconnection Networks
ICCD '04 Proceedings of the IEEE International Conference on Computer Design
Exploring the Design Space of Power-Aware Opto-Electronic Networked Systems
HPCA '05 Proceedings of the 11th International Symposium on High-Performance Computer Architecture
Power Saving in Regular Interconnection Networks Built with High-Degree Switches
IPDPS '05 Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Papers - Volume 01
Software-directed power-aware interconnection networks
Proceedings of the 2005 international conference on Compilers, architectures and synthesis for embedded systems
SC '05 Proceedings of the 2005 ACM/IEEE conference on Supercomputing
Comparing Adaptive Routing and Dynamic Voltage Scaling for Link Power Reduction
IEEE Computer Architecture Letters
Power saving in regular interconnection networks
Parallel Computing
Power-aware fat-tree networks using on/off links
HPCC'07 Proceedings of the Third international conference on High Performance Computing and Communications
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Current trends in high-performance parallel computers show that fat-tree interconnection networks are one of the most popular topologies. The particular characteristics of this topology, that provide multiple alternative paths for each source/destination pair, make it an excellent candidate for applying power consumption reduction techniques. Such techniques are being increasingly applied in computer systems and the interconnection network is not an exception, since its contribution to the system power budget is not negligible. In this paper, we present a mechanism that dynamically switches on and off network links as a function of traffic. The mechanism is designed to guarantee network connectivity, according to the underlying routing algorithm. In this way, the default routing algorithm can be used regardless of the power saving actions taken, thus simplifying router design. Our simulation results show that significant network power consumption reductions can be obtained at no cost. Latency remains the same although the number of operating network links is dynamically adjusted.