Microarchitectural techniques for power gating of execution units
Proceedings of the 2004 international symposium on Low power electronics and design
New Generation of Predictive Technology Model for Sub-45nm Design Exploration
ISQED '06 Proceedings of the 7th International Symposium on Quality Electronic Design
MiBench: A free, commercially representative embedded benchmark suite
WWC '01 Proceedings of the Workload Characterization, 2001. WWC-4. 2001 IEEE International Workshop
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IEEE Micro
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Proceedings of the 44th annual Design Automation Conference
Low Power Design Essentials
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IEEE Circuits and Systems Magazine
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CMOS VLSI Design: A Circuits and Systems Perspective
CMOS VLSI Design: A Circuits and Systems Perspective
From transistors to MEMS: throughput-aware power gating in CMOS circuits
Proceedings of the Conference on Design, Automation and Test in Europe
A framework for power-gating functional units in embedded microprocessors
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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This paper presents a case for using Nano-Electro-Mechanical-System switches for power gating idle functional units of an embedded microprocessor. We achieve an average of 26% total energy savings, with a worst-case 5% increase in cycles. Our work includes detailed comparison with transistor switches, actuation circuitry design, identification of desired switch parameters, and device lifetime analysis.