Transistor sizing issues and tool for multi-threshold CMOS technology
DAC '97 Proceedings of the 34th annual Design Automation Conference
Theoretical and practical limits of dynamic voltage scaling
Proceedings of the 41st annual Design Automation Conference
Characterizing and modeling minimum energy operation for subthreshold circuits
Proceedings of the 2004 international symposium on Low power electronics and design
Utilizing reverse short channel effect for optimal subthreshold circuit design
Proceedings of the 2006 international symposium on Low power electronics and design
Optimal technology selection for minimizing energy and variability in low voltage applications
Proceedings of the 13th international symposium on Low power electronics and design
Interests and limitations of technology scaling for subthreshold logic
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
From transistors to MEMS: throughput-aware power gating in CMOS circuits
Proceedings of the Conference on Design, Automation and Test in Europe
Low-power subthreshold to above threshold level shifters in 90nm and 65nm process
Microprocessors & Microsystems
A case for NEMS-based functional-unit power gating of low-power embedded microprocessors
Proceedings of the 48th Design Automation Conference
Variability-speed-consumption trade-off in near threshold operation
PATMOS'11 Proceedings of the 21st international conference on Integrated circuit and system design: power and timing modeling, optimization, and simulation
From Transistors to NEMS: Highly Efficient Power-Gating of CMOS Circuits
ACM Journal on Emerging Technologies in Computing Systems (JETC)
Decoupling capacitor design strategy for minimizing supply noise of ultra low voltage circuits
Proceedings of the 49th Annual Design Automation Conference
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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Subthreshold operation is a promising method for reducing power consumption in ultra-low power applications, such as active RFIDs and sensor networks. It was shown in previous works that operating at the Vmin supply voltage results in optimal energy operation, where Vmin typically falls below the threshold voltage. However, all previous subthreshold analyses ignore the leakage current in standby mode. Hence, for applications where operation at Vmin results in completion of the task well ahead of the required deadline, the energy consumption can be significantly under-estimated. In this paper, we investigate the effect of the non-zero standby energy on the optimal energy consumption in subthreshold operation. We first analyze energy consumption both with and without a cutoff technique in standby mode. Two parameters are proposed to capture the cutoff structure's effect on the energy consumption. Second, a methodology to minimize the total energy consumption is addressed. The selection of the cutoff structure is examined by comparing three different structures. Then, a co-optimization method to optimize the size of the cutoff structure concurrently with the supply voltage, is proposed. This approach reduces energy by 99.2% compared to standby-energy-unaware optimization.