Fundamentals of modern VLSI devices
Fundamentals of modern VLSI devices
Ultra-low power digital subthreshold logic circuits
ISLPED '99 Proceedings of the 1999 international symposium on Low power electronics and design
Digital CMOS logic operation in the sub-threshold region
GLSVLSI '00 Proceedings of the 10th Great Lakes symposium on VLSI
Robust ultra-low power sub-threshold DTMOS logic
ISLPED '00 Proceedings of the 2000 international symposium on Low power electronics and design
Robust subthreshold logic for ultra-low power operation
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special issue on low power electronics and design
Sub-Domino Logic: Ultra-Low Power Dynamic Sub-Threshold Digital Logic
VLSID '01 Proceedings of the The 14th International Conference on VLSI Design (VLSID '01)
Optimal Supply and Threshold Scaling for Subthreshold CMOS Circuits
ISVLSI '02 Proceedings of the IEEE Computer Society Annual Symposium on VLSI
Body-bias compensation technique for SubThreshold CMOS static logic gates
SBCCI '04 Proceedings of the 17th symposium on Integrated circuits and system design
A variation tolerant subthreshold design approach
Proceedings of the 42nd annual Design Automation Conference
Analysis and mitigation of variability in subthreshold design
ISLPED '05 Proceedings of the 2005 international symposium on Low power electronics and design
Double-Gate SOI Devices for Low-Power and High-Performance Applications
VLSID '06 Proceedings of the 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Subthreshold logical effort: a systematic framework for optimal subthreshold device sizing
Proceedings of the 43rd annual Design Automation Conference
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Variation-driven device sizing for minimum energy sub-threshold circuits
Proceedings of the 2006 international symposium on Low power electronics and design
Sub-threshold design: the challenges of minimizing circuit energy
Proceedings of the 2006 international symposium on Low power electronics and design
Subthreshold Pass Transistor Logic for Ultra-Low Power Operation
ISVLSI '07 Proceedings of the IEEE Computer Society Annual Symposium on VLSI
Analysis and optimization of sleep modes in subthreshold circuit design
Proceedings of the 44th annual Design Automation Conference
Nanometer device scaling in subthreshold circuits
Proceedings of the 44th annual Design Automation Conference
Utilizing reverse short-channel effect for optimal subthreshold circuit design
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Ultra-low-power DLMS adaptive filter for hearing aid applications
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Performance analysis of FPGA interconnect fabric for ultra-low power applications
Proceedings of the 2011 International Conference on Communication, Computing & Security
Performance optimization of CNFET for ultra-low power reconfigurable architecture
Proceedings of the 2011 International Conference on Communication, Computing & Security
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In recent years, subthreshold operation has gained a lot of attention due to ultra low-power consumption in applications requiring low to medium performance. It has also been shown that by optimizing the device structure, power consumption of digital subthreshold logic can be further minimized while improving its performance. Therefore, subthreshold circuit design is very promising for future ultra low-energy sensor applications as well as high-performance parallel processing. This paper deals with various device and circuit design challenges associated with the state of the art in optimal digital subthreshold circuit design and reviews device design methodologies and circuit topologies for optimal digital subthreshold operation. This paper identifies the suitable candidates for subthreshold operation at device and circuit levels for optimal subthreshold circuit design and provides an effective roadmap for digital designers interested to work with ultra low-power applications.