Iterative timing analysis considering interdependency of setup and hold times

Authors:
Ning Chen;Bing Li;Ulf Schlichtmann
Affiliations:
Institute for Electronic Design Automation, Technische Universitaet Muenchen, Munich, Germany;Institute for Electronic Design Automation, Technische Universitaet Muenchen, Munich, Germany;Institute for Electronic Design Automation, Technische Universitaet Muenchen, Munich, Germany
Venue:
PATMOS'11 Proceedings of the 21st international conference on Integrated circuit and system design: power and timing modeling, optimization, and simulation
Year:
2011

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Abstract

The interdependency of setup and hold times of flipflops in digital circuits needs to be considered in order to obtain more accurate results of timing analysis. In this paper, an iterative STA method is developed based on a new modeling of flipflop timing behavior. Two basic problems are solved: whether a circuit can work at a given clock period, and how the minimal clock period is determined. Experimental results show that a reduction of the clock period by 3.3% can be achieved compared to traditional STA method.