RASP: a general logic synthesis system for SRAM-based FPGAs
Proceedings of the 1996 ACM fourth international symposium on Field-programmable gate arrays
Chaff: engineering an efficient SAT solver
Proceedings of the 38th annual Design Automation Conference
RT-Level ITC'99 Benchmarks and First ATPG Results
IEEE Design & Test
VIS: A System for Verification and Synthesis
CAV '96 Proceedings of the 8th International Conference on Computer Aided Verification
Area optimizations in fpga architecture and cad
Area optimizations in fpga architecture and cad
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Design, synthesis and evaluation of heterogeneous FPGA with mixed LUTs and macro-gates
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Formal methods for the analysis and synthesis of nanometer-scale cellular arrays
ACM Journal on Emerging Technologies in Computing Systems (JETC)
A solver for QBFs in negation normal form
Constraints
Robust FPGA resynthesis based on fault-tolerant Boolean matching
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
Reasoning in Argumentation Frameworks Using Quantified Boolean Formulas
Proceedings of the 2006 conference on Computational Models of Argument: Proceedings of COMMA 2006
Design and synthesis of programmable logic block with mixed LUT and macrogate
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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This paper describes a novel Field Programmable Gate Array (FPGA) logic synthesis technique which determines if a logic function can be implemented in a given programmable circuit and describes how this problem can be formalized and solved using Quantified Boolean Satisfiability. This technique is general enough to be applied to any type of logic function and programmable circuit; thus, it has many applications to FPGAs. The applications demonstrated in this paper include FPGA technology mapping and resynthesis where their results show significant FPGA performance improvements.