Heterogeneous integration to simplify many-core architecture simulations

Authors:
Raphael Poss;Mike Lankamp;M. Irfan Uddin;Jaroslav Sýkora;Leoš Kafka
Affiliations:
University of Amsterdam, The Netherlands;University of Amsterdam, The Netherlands;University of Amsterdam, The Netherlands;Institute of Information Theory and Automation, Czech Republic;Institute of Information Theory and Automation, Czech Republic
Venue:
Proceedings of the 2012 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools
Year:
2012

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Apple-CORE: Harnessing general-purpose many-cores with hardware concurrency management

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Abstract

The EU Apple-CORE project has explored the design and implementation of novel general-purpose many-core chips featuring hardware microthreading and hardware support for concurrency management. The introduction of the latter in the cores ISA has required simultaneous investigation into compilers and multiple layers of the software stack, including operating systems. The main challenge in such vertical approaches is the cost of implementing simultaneously a detailed simulation of new hardware components and a complete system platform suitable to run large software bench-maks. In this paper, we describe our use case and our solutions to this challenge.