Foundations of logic programming
Foundations of logic programming
Newtonian arbiters cannot be proven correct
Formal Methods in System Design - Special issue on designing correct circuits
Analysis of cyclic combinational circuits
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Application of Ternary Algebra to the Study of Static Hazards
Journal of the ACM (JACM)
TABLEAUX '96 Proceedings of the 5th International Workshop on Theorem Proving with Analytic Tableaux and Related Methods
An Intuitionistic Modal Logic with Applications to the Formal Verification of Hardware
CSL '94 Selected Papers from the 8th International Workshop on Computer Science Logic
On a Ternary Model of Gate Networks
IEEE Transactions on Computers
Equivalence of the Arbiter, the Synchronizer, the Latch, and the Inertial Delay
IEEE Transactions on Computers
A Note on Three-Valued Logic Simulation
IEEE Transactions on Computers
Hazard detection in combinational and sequential switching circuits
IBM Journal of Research and Development
General theory of metastable operation
IEEE Transactions on Computers
Timing Analysis of Combinational Circuits in Intuitionistic Propositional Logic
Formal Methods in System Design
Abstraction and Refinement in Higher Order Logic
TPHOLs '01 Proceedings of the 14th International Conference on Theorem Proving in Higher Order Logics
The analysis of cyclic circuits with Boolean satisfiability
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
Constructive Boolean circuits and the exactness of timed ternary simulation
Formal Methods in System Design
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We prove the equivalence between the ternary circuit model and a notion of intuitionistic stabilization bounds. This formalizes in a mathematically precise way the intuitive understanding of the ternary model as a level intermediate between the static Boolean model and the (discrete) real-time behaviour of circuits. We show that if one takes an intensional view of the ternary model then the delays that have been abstracted away can be completely recovered. Our intensional soundness and completeness theorems imply that the extracted delays are both correct and exact; thus we have developed a framework which unifies ternary simulation and functional timing analysis. Our focus is on the combinational behaviour of gate-level circuits with feedback.