IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on low power
First-order incremental block-based statistical timing analysis
Proceedings of the 41st annual Design Automation Conference
Statistical Timing Analysis Considering Spatial Correlations using a Single Pert-Like Traversal
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Proceedings of the 42nd annual Design Automation Conference
Block based statistical timing analysis with extended canonical timing model
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
The limit of dynamic voltage scaling and insomniac dynamic voltage scaling
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A framework for statistical timing analysis using non-linear delay and slew models
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
A new statistical max operation for propagating skewness in statistical timing analysis
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Non-Gaussian statistical timing analysis using second-order polynomial fitting
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Voltage binning under process variation
Proceedings of the 2009 International Conference on Computer-Aided Design
A Linear-Time Approach for Static Timing Analysis Covering All Process Corners
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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