Design and design automation of rectification logic for engineering change
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Engineering change using spare cells with constant insertion
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
SafeResynth: A new technique for physical synthesis
Integration, the VLSI Journal
Towards automated ECOs in FPGAs
Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays
Spare cells with constant insertion for engineering change
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Interpolation-based incremental ECO synthesis for multi-error logic rectification
Proceedings of the 48th Design Automation Conference
Match and replace: a functional ECO engine for multi-error circuit rectification
Proceedings of the International Conference on Computer-Aided Design
Proceedings of the International Conference on Computer-Aided Design
Intuitive ECO synthesis for high performance circuits
Proceedings of the Conference on Design, Automation and Test in Europe
Multi-patch generation for multi-error logic rectification by interpolation with cofactor reduction
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
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We address the problem of rectifying an erroneous combinational circuit. Based on the symbolic binary decision diagram techniques, we consider the rectification process as a sequence of partial corrections. Each partial correction reduces the size of the input vector set that produces error responses. Compared with the existing approaches, this approach is more general, and thus, suitable for circuits with multiple errors and for the engineering change problem. Also, we derive the necessary and sufficient condition of general single-gate correction to improve the quality of rectification. To handle larger circuits, we develop a hybrid approach that makes use of the information of structural correspondence between specification and implementation. Experiments are performed on a suite of industrial examples as well as the entire set of ISCAS'85 benchmark circuits to demonstrate its effectiveness