The ESTEREL synchronous programming language: design, semantics, implementation
Science of Computer Programming
Implementation of the data-flow synchronous language SIGNAL
PLDI '95 Proceedings of the ACM SIGPLAN 1995 conference on Programming language design and implementation
Automatic Distribution of Reactive Systems for Asynchronous Networks of Processors
IEEE Transactions on Software Engineering
Information and Computation
Communication and Concurrency
A Fundamental Tehoerem of Asynchronous Parallel Computation
Proceedings of the Sagamore Computer Conference on Parallel Processing
MEMOCODE '03 Proceedings of the First ACM and IEEE International Conference on Formal Methods and Models for Co-Design
Globally-asynchronous locally-synchronous systems (performance, reliability, digital)
Globally-asynchronous locally-synchronous systems (performance, reliability, digital)
Generalized Latency-Insensitive Systems for Single-Clock and Multi-Clock Architectures
Proceedings of the conference on Design, automation and test in Europe - Volume 2
Specification and analysis of synchronous reactions
Formal Aspects of Computing
Correct-by-Construction Asynchronous Implementation of Modular Synchronous Specifications
ACSD '05 Proceedings of the Fifth International Conference on Application of Concurrency to System Design
Concurrency in Synchronous Systems
Formal Methods in System Design
Necessary and sufficient conditions for deterministic desynchronization
EMSOFT '07 Proceedings of the 7th ACM & IEEE international conference on Embedded software
Moving from Weakly Endochronous Systems to Delay-Insensitive Circuits
Electronic Notes in Theoretical Computer Science (ENTCS)
Bounded dataflow networks and latency-insensitive circuits
MEMOCODE'09 Proceedings of the 7th IEEE/ACM international conference on Formal Methods and Models for Codesign
Theory of latency-insensitive design
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Desynchronization: Synthesis of Asynchronous Circuits From Synchronous Specifications
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Multi-threaded code generation from Signal program to OpenMP
Frontiers of Computer Science: Selected Publications from Chinese Universities
| Hi-index | 0.00 |
We propose a general method to characterize and synthesize correctness-preserving asynchronous wrappers for synchronous processes on a globally asynchronous locally synchronous (GALS) architecture. While a synchronous process may rely on the absence of a signal to trigger a reaction, sensing absence in an asynchronous environment may be unfeasible due to uncontrolled communication latencies. A simple and common solution is to systematically encode and send absence notifications, but it is unduly expensive at run-time. Instead, our approach is based on the theory of weakly endochronous systems, which defines the largest sub-class of synchronous systems where (possibly concurrent) asynchronous evaluation is faithful to the original (synchronous) specification. Our method considers synchronous processes or modules that are specified by synchronization constraints expressed in a high-level multi-clock synchronous reactive formalism. The algorithm uses a compact representation of the abstract synchronization configurations of the analyzed process and determines a minimal set of synchronization patterns generating by union all its possible reactions. A specification is weakly endochronous if and only if these generators do not need explicit absence information. In this case, the set of generators can directly be used to synthesize the concurrent asynchronous multi-rate wrapper of the process.