Compilers: principles, techniques, and tools
Compilers: principles, techniques, and tools
Dominators, super blocks, and program coverage
POPL '94 Proceedings of the 21st ACM SIGPLAN-SIGACT symposium on Principles of programming languages
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Hardware emulation for functional verification of K5
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Software unit test coverage and adequacy
ACM Computing Surveys (CSUR)
Functional verification of large ASICs
DAC '98 Proceedings of the 35th annual Design Automation Conference
FPGA prototyping of a RISC processor core for embedded applications
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Efficient instrumentation for code coverage testing
ISSTA '02 Proceedings of the 2002 ACM SIGSOFT international symposium on Software testing and analysis
High-level modeling and FPGA prototyping of microprocessors
FPGA '03 Proceedings of the 2003 ACM/SIGDA eleventh international symposium on Field programmable gate arrays
Coverage Metrics for Functional Validation of Hardware Designs
IEEE Design & Test
Incorporating Ef.cient Assertion Checkers into Hardware Emulation
ICCD '05 Proceedings of the 2005 International Conference on Computer Design
Improved verification of hardware designs through antecedent conditioned slicing
International Journal on Software Tools for Technology Transfer (STTT) - Special Section on Advances in Automated Verification of Critical Systems
Principles of Program Analysis
Principles of Program Analysis
Post-silicon code coverage evaluation with reduced area overhead for functional verification of SoC
HLDVT '11 Proceedings of the 2011 IEEE International High Level Design Validation and Test Workshop
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Full-system emulation and prototyping is now being used widely in the industry for System-on-Chip (SoC) verification. Emulation/ prototyping platforms run tests in a fraction of time compared to the traditional simulation based verification. However, unlike simulation, they do not provide visibility into the hardware design source code. As a result, they fail to provide any information about code coverage achieved, which is an important metric to measure the completeness of the verification process. In this paper, we present a novel technique to extract code coverage from emulation/prototyping platforms. Through analysis of the source code for the hardware design, we relate the evaluation of branch conditions to other statements in the code. Evaluation of the branch conditions is recorded using additional logic during emulation, and mapped back to the code to obtain coverage information. We apply our technique to an industrial system, and show that it can efficiently provide code coverage statistics that are faithful to the coverage obtained from simulation. We also perform experiments on the publicly available OpenRISC processor and demonstrate similar results.