DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Emulation verification of the Motorola 68060
ICCD '95 Proceedings of the 1995 International Conference on Computer Design: VLSI in Computers and Processors
Module generation of complex macros for logic-emulation applications
FPGA '97 Proceedings of the 1997 ACM fifth international symposium on Field-programmable gate arrays
A C-based RTL design verification methodology for complex microprocessor
DAC '97 Proceedings of the 34th annual Design Automation Conference
Virtual chip: making functional models work on real target systems
DAC '98 Proceedings of the 35th annual Design Automation Conference
High-level design verification of microprocessors via error modeling
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Functional verification methodology for microprocessors using the Genesys test-program generator
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Verification of a microprocessor using real world applications
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Fast development of source-level debugging system using hardware emulation (short paper)
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
A transaction-based unified simulation/emulation architecture for functional verification
Proceedings of the 38th annual Design Automation Conference
Static schedluing of multiple asynchronous domains for functional verification
Proceedings of the 38th annual Design Automation Conference
Static scheduling of multi-domain memories for functional verification
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
High-level modeling and FPGA prototyping of microprocessors
FPGA '03 Proceedings of the 2003 ACM/SIGDA eleventh international symposium on Field programmable gate arrays
Proceedings of the 41st annual Design Automation Conference
Emulating switch-level models of CMOS circuits
Microelectronic Engineering
Fast co-verification of HDL models
Microelectronic Engineering
Efficient Memory Utilization for High-Speed FPGA-Based Hardware Emulators with SDRAMs
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
A transaction-based unified architecture for simulation and emulation
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Checking architectural outputs instruction-by-instruction on acceleration platforms
Proceedings of the 49th Annual Design Automation Conference
Using static analysis for coverage extraction fromemulation/prototyping platforms
Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
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