Instruction set selection for ASIP design
CODES '99 Proceedings of the seventh international workshop on Hardware/software codesign
High-level modeling and FPGA prototyping of microprocessors
FPGA '03 Proceedings of the 2003 ACM/SIGDA eleventh international symposium on Field programmable gate arrays
Multiobjective Design of Embedded Processors on FPGA Platforms
ICDCSW '04 Proceedings of the 24th International Conference on Distributed Computing Systems Workshops - W7: EC (ICDCSW'04) - Volume 7
An SoC design methodology using FPGAs and embedded microprocessors
Proceedings of the 41st annual Design Automation Conference
Journal of VLSI Signal Processing Systems
Extracting and improving microarchitecture performance on reconfigurable architectures
International Journal of Parallel Programming - Special issue: The next generation software program
Intel® atom™ processor core made FPGA-synthesizable
Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays
Efficient Memory Utilization for High-Speed FPGA-Based Hardware Emulators with SDRAMs
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
FPGA-based real-time remote monitoring system
Computers and Electronics in Agriculture
Intel nehalem processor core made FPGA synthesizable
Proceedings of the 18th annual ACM/SIGDA international symposium on Field programmable gate arrays
Reconfiguration support for vector operations
International Journal of High Performance Systems Architecture
Proceedings of the ACM/SIGDA international symposium on Field Programmable Gate Arrays
RAPANUI: rapid prototyping for media processor architecture exploration
SAMOS'05 Proceedings of the 5th international conference on Embedded Computer Systems: architectures, Modeling, and Simulation
Using static analysis for coverage extraction fromemulation/prototyping platforms
Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Modeling, validation, and co-design of IBM Blue Gene/Q: tools and examples
IBM Journal of Research and Development
A multi-context processor for real-time concurrent tasks fuzzy reasoning
Journal of Intelligent & Fuzzy Systems: Applications in Engineering and Technology
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Application-specific processors offer an attractive option in the design of embedded systems by providing high performance for a specific application domain. In this work, we describe the use of a reconfigurable processor core based on an RISC architecture as starting point for application-specific processor design. By using a common base instruction set, development cost can be reduced and design space exploration is focused on the application-specific aspects of performance. An important aspect of deploying any new architecture is verification which usually requires lengthy software simulation of a design model. We show how hardware emulation based on programmable logic can be integrated into the hardware/software codesign flow. While previously hardware emulation required massive investment in design effort and special purpose emulators, an emulation approach based on high-density field-programmable gate array (FPGA) devices now makes hardware emulation practical and cost effective for embedded processor designs. To reduce development cost and avoid duplication of design effort, FPGA prototypes and ASIC implementations are derived from a common source: We show how to perform targeted optimizations to fully exploit the capabilities of the target technology while maintaining a common source base.