Testing delay-insensitive circuits
Proceedings of the 1991 University of California/Santa Cruz conference on Advanced research in VLSI
Semi-modularity and testability of speed-independent circuits
Integration, the VLSI Journal - Special issue on high-level synthesis
Concurrent hardware: the theory and practice of self-timed design
Concurrent hardware: the theory and practice of self-timed design
Testing asynchronous circuits: a survey
Integration, the VLSI Journal
Detecting Exitory Stuck-At Faults in Semimodular Asynchronous Circuits
IEEE Transactions on Computers
Algorithms for Synthesis and Testing of Asynchronous Circuits
Algorithms for Synthesis and Testing of Asynchronous Circuits
Self-Timed Control of Concurrent Processes: The Design of Aperiodic Logical Circuits in Computers and Discrete Systems
High-Level Modeling and Design of Asynchronous Interface Logic
IEEE Design & Test
Asynchronous Circuit Synthesis by Direct Mapping: Interfacing to Environment
ASYNC '02 Proceedings of the 8th International Symposium on Asynchronus Circuits and Systems
Modular Design of Asynchronous Circuits Defined by Graphs
IEEE Transactions on Computers
Direct Implementation of Asynchronous Control Units
IEEE Transactions on Computers
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The application of asynchronous circuit has been greatly restricted by reason of lacking effective technologies to test. Making use of the self-checking property of asynchronous control circuit, we may preferably solve this problem. In the paper, we put forward an improved, failstop David Cell, describe a way of designing self-checking asynchronous control circuits by the direct mapping technique, and propose the testing method for single stuck-at faults. The result shows that self-checking counterpart can be tested at normal operation speed and the area overhead is acceptable.