Recent directions in netlist partitioning: a survey
Integration, the VLSI Journal
Quantified suboptimality of VLSI layout heuristics
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
NRG: global and detailed placement
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Partitioning-based standard-cell global placement with an exact objective
Proceedings of the 1997 international symposium on Physical design
Can recursive bisection alone produce routable placements?
Proceedings of the 37th Annual Design Automation Conference
An approximation algorithm for the shortest common supersequence problem: an experimental analysis
Proceedings of the 2001 ACM symposium on Applied computing
Dragon2000: standard-cell placement tool for large industry circuits
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Optimality, scalability and stability study of partitioning and placement algorithms
Proceedings of the 2003 international symposium on Physical design
Engineering a scalable placement heuristic for DNA probe arrays
RECOMB '03 Proceedings of the seventh annual international conference on Research in computational molecular biology
Border Length Minimization in DNA Array Design
WABI '02 Proceedings of the Second International Workshop on Algorithms in Bioinformatics
Evaluation of Placement Techniques for DNA Probe Array Layout
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Temporal floorplanning using the T-tree formulation
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Optimality and scalability study of existing placement algorithms
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Placement of digital microfluidic biochips using the t-tree formulation
Proceedings of the 43rd annual Design Automation Conference
No free lunch theorems for optimization
IEEE Transactions on Evolutionary Computation
Computer-Aided Optimization of DNA Array Design and Manufacturing
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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DNA microarrays are used extensively for biochemical analysis that includes genomics and drug discovery. This increased usage demands large microarrays, thus complicating their computer aided design (CAD) and manufacturing methodologies. One such time-consuming design problem is to minimize the border length of masks used during the manufacture of microarrays. From the manufacturing point of view the border length of masks is one of the crucial parameters determining the reliability of the microarray. This article presents a novel algorithm for synthesis (placement and embedding) of microarrays, which consumes significantly less time than the best algorithm reported in the literature, while maintaining the quality (border length of masks) of the result. The proposed technique uses only a part of each probe to decide on the placement and the remaining parts for deciding on the embedding sequence. This is in contrast to the earlier methods that considered the entire probe for both placement and embedding. The second novelty of the proposed technique is the preclassification (prior to placement and embedding) of probes based on their prefixes. This decreases the complexity of the problem of deciding the next probe to be placed from that involving computation of Hamming distance between all probes (as used in earlier approaches) to the one involving searching of nonempty cells on a constant size grid array. The proposed algorithm is 43× faster than the best reported in the literature for the case of synthesizing a microarray with 250,000 probes and further exhibits linear behavior in terms of computation time for larger microarrays.