Double patterning technology friendly detailed routing
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
Layout decomposition approaches for double patterning lithography
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems - Special issue on the 2009 ACM/IEEE international symposium on networks-on-chip
Double patterning lithography aware gridless detailed routing with innovative conflict graph
Proceedings of the 47th Design Automation Conference
Enhancing double-patterning detailed routing with lazy coloring and within-path conflict avoidance
Proceedings of the Conference on Design, Automation and Test in Europe
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Layout decomposition for triple patterning lithography
Proceedings of the International Conference on Computer-Aided Design
WISDOM: wire spreading enhanced decomposition of masks in double patterning lithography
Proceedings of the International Conference on Computer-Aided Design
DUNE-a multilayer gridless routing system
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
MARS-a multilevel full-chip gridless routing system
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Dealing with IC manufacturability in extreme scaling
Proceedings of the International Conference on Computer-Aided Design
A high-performance triple patterning layout decomposer with balanced density
Proceedings of the International Conference on Computer-Aided Design
Methodology for standard cell compliance and detailed placement for triple patterning lithography
Proceedings of the International Conference on Computer-Aided Design
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TPL-friendly detailed routers require a systematic approach to detect TPL conflicts. However, the complexity of conflict graph (CG) impedes directly detecting TPL conflicts in CG. This work proposes a token graph-embedded conflict graph (TECG) to facilitate the TPL conflict detection while maintaining high coloring-flexibility. We then develop a TPL aware detailed router (TRIAD) by applying TECG to a gridless router with the TPL stitch generation. Compared to a greedy coloring approach, experimental results indicate that TRIAD generates no conflicts and few stitches with shorter wirelength at the cost of 2.41x of runtime.