Post global routing crosstalk risk estimation and reduction
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
B*-Trees: a new representation for non-slicing floorplans
Proceedings of the 37th Annual Design Automation Conference
VISI Physical Design Automation: Theory and Practice
VISI Physical Design Automation: Theory and Practice
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Inductance Modeling for On-Chip Interconnects
Analog Integrated Circuits and Signal Processing
Track assignment: a desirable intermediate step between global routing and detailed routing
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Timing driven track routing considering coupling capacitance
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
FastRoute: a step to integrate global routing into placement
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Minimum crosstalk channel routing
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
An efficient approach to multilayer layer assignment with an application to via minimization
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Global routing with crosstalk constraints
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Floorplanning using a tree representation
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Timing- and crosstalk-driven area routing
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Pseudopin assignment with crosstalk noise control
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
DUNE-a multilayer gridless routing system
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Crosstalk- and performance-driven multilevel full-chip routing
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Cross point assignment with global rerouting for general-architecture designs
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
TRIAD: a triple patterning lithography aware detailed router
Proceedings of the International Conference on Computer-Aided Design
BonnRoute: Algorithms and data structures for fast and good VLSI routing
ACM Transactions on Design Automation of Electronic Systems (TODAES)
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Track assignment, which is an intermediate stage between global routing and detailed routing, provides a good platform for promoting performance, and for imposing additional constraints during routing, such as crosstalk. Gridless track assignment (GTA) has not been addressed in public literature. This work develops a gridless routing system integrating a congestion-driven global router, crosstalk-driven GTA and an enhanced implicit connection-graph-based router. Initial assignment is produced rapidly with a left-edge like algorithm. Crosstalk reduction on the assignment is then transformed to a restricted nonslicing floorplanning problem, and a deterministic O-Tree based algorithm is employed to reassign each net segment. Finally, each panel is partitioned into several subpanels, and the subpanels are reordered using branch and bound algorithm to decrease the crosstalk further. Before detailed routing, routing tree construction is undertaken for placed IRoutes and other pins; many original point-to-point routings are set to connect to IRoutes, and can be accomplished simply with pattern routing. For detailed routing, this work proposes a rapid extraction method for pseudomaximum stripped tiles to boost path propagation. Experimental results demonstrate that the proposed gridless routing system has over 2.02 times the runtime speedup in average for fixed- and variable-rule routings of an implicit connection-graph-based router, NEMO. As compared with a commercial routing tool, this work yields an average reduction rate of 13.8% in coupling capacitance calculated using its built-in coupling capacitance estimator.