Functional correlation analysis in crosstalk induced critical paths identification
Proceedings of the 38th annual Design Automation Conference
Timing analysis with crosstalk as fixpoints on complete lattice
Proceedings of the 38th annual Design Automation Conference
On convergence of switching windows computation in presence of crosstalk noise
Proceedings of the 2002 international symposium on Physical design
Clock schedule verification with crosstalk
Proceedings of the 8th ACM/IEEE international workshop on Timing issues in the specification and synthesis of digital systems
Efficient switching window computation for cross-talk noise
Proceedings of the 8th ACM/IEEE international workshop on Timing issues in the specification and synthesis of digital systems
Non-iterative switching window computation for delay-noise
Proceedings of the 40th annual Design Automation Conference
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
A non-iterative model for switching window computation with crosstalk noise
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
Timing Verification with Crosstalk for Transparently Latched Circuits
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Trade-off between latch and flop for min-period sequential circuit designs with crosstalk
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
Pessimism reduction in crosstalk noise aware STA
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
Integration, the VLSI Journal
NostraXtalk: a predictive framework for accurate static timing analysis in udsm vlsi circuits
Proceedings of the 17th ACM Great Lakes symposium on VLSI
Estimating path delay distribution considering coupling noise
Proceedings of the 17th ACM Great Lakes symposium on VLSI
Top-k aggressors sets in delay noise analysis
Proceedings of the 44th annual Design Automation Conference
Victim alignment in crosstalk aware timing analysis
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
A noniterative equivalent waveform model for timing analysis in presence of crosstalk
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Analog Integrated Circuits and Signal Processing
Victim alignment in crosstalk-aware timing analysis
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Pessimism reduction in coupling-aware static timing analysis using timing and logic filtering
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
FA-STAC: An algorithmic framework for fast and accurate coupling aware static timing analysis
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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Crosstalk is generally recognized as a major problem in integrated circuit design. This paper presents a novel approach to the efficient measurement of the effect of crosstalk on the delay of a net using an algorithm whose worst case complexity is polynomial-time in the number of nets. The cost of the algorithm is seen to be O(n log n) in practice, where n is the number of nets, and it is amenable to being incorporated into the inner loop of a timing optimizer. To illustrate this, the method is applied to reduce the effects of crosstalk in channel routing, where it is seen to give an average improvement of 23% in the delay in a channel as compared to the worst case, as measured by SPICE