Modelling extremal events: for insurance and finance
Modelling extremal events: for insurance and finance
Test Metrics for Analog Parametric Faults
VTS '99 Proceedings of the 1999 17TH IEEE VLSI Test Symposium
Specification Test Compaction for Analog Circuits and MEMS
Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Estimation of Test Metrics for the Optimisation of Analogue Circuit Testing
Journal of Electronic Testing: Theory and Applications
VLSID '08 Proceedings of the 21st International Conference on VLSI Design
Evaluation of analog/RF test measurements at the design stage
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
RF specification test compaction using learning machines
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Fast and Accurate DPPM Computation Using Model Based Filtering
ETS '11 Proceedings of the 2011 Sixteenth IEEE European Test Symposium
On proving the efficiency of alternative RF tests
Proceedings of the International Conference on Computer-Aided Design
A Study of Variance Reduction Techniques for Estimating Circuit Yields
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Minimizing production test time to detect faults in analog circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Estimation of Analog Parametric Test Metrics Using Copulas
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Experiences with non-intrusive sensors for RF built-in test
ITC '12 Proceedings of the 2012 IEEE International Test Conference (ITC)
| Hi-index | 0.00 |
The high cost of testing certain analog, mixed-signal, and RF circuits has driven in the recent years the development of alternative low-cost tests to replace the most costly or even all standard specification tests. However, there is a lack of solutions for evaluating the parametric test error, that is, the test error for circuits with process variations, resulting from this replacement. For this reason, test engineers are often reluctant to adopt alternative tests since it is not guaranteed that test cost reduction is not achieved at the expense of sacrificing test quality. In this paper, we present a technique to estimate the parametric test error fast and reliably with parts per million accuracy. The technique is based on extreme value theory and statistical blockade. Relying on a small number of targeted simulations, it is capable of providing accurate estimates of parametric test error in the general scenario where a set of alternative tests replaces all or a subset of standard specification tests.