Automatic synthesis of extended burst-mode circuits using generalized C-elements
EURO-DAC '96/EURO-VHDL '96 Proceedings of the conference on European design automation
Detecting Exitory Stuck-At Faults in Semimodular Asynchronous Circuits
IEEE Transactions on Computers
Logic Synthesis and Verification
Checking Combinational Equivalence of Speed-Independent Circuits
Formal Methods in System Design
Hierarchical gate-level verification of speed-independent circuits
ASYNC '95 Proceedings of the 2nd Working Conference on Asynchronous Design Methodologies
General Conditions for the Decomposition of State-Holding Elements
ASYNC '96 Proceedings of the 2nd International Symposium on Advanced Research in Asynchronous Circuits and Systems
Optimizing average-case delay in technology mapping of burst-mode circuits
ASYNC '96 Proceedings of the 2nd International Symposium on Advanced Research in Asynchronous Circuits and Systems
Structural Methods for the Synthesis of Speed-Independent Circuits
EDTC '96 Proceedings of the 1996 European conference on Design and Test
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