Power analysis of embedded software: a first step towards software power minimization
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special issue on low-power design
Instruction level power analysis and optimization of software
Journal of VLSI Signal Processing Systems - Special issue on technologies for wireless computing
MediaBench: a tool for evaluating and synthesizing multimedia and communicatons systems
MICRO 30 Proceedings of the 30th annual ACM/IEEE international symposium on Microarchitecture
The design and use of simplepower: a cycle-accurate energy estimation tool
Proceedings of the 37th Annual Design Automation Conference
System level optimization and design space exploration for low power
Proceedings of the 14th international symposium on Systems synthesis
PowerPlay-Fast Dynamic Power Estimation Based on Logic Simulation
ICCD '91 Proceedings of the 1991 IEEE International Conference on Computer Design on VLSI in Computer & Processors
RTL Processor Synthesis for Architecture Exploration and Implementation
Proceedings of the conference on Design, automation and test in Europe - Volume 3
ArchC: A SystemC-Based Architecture Description Language
SBAC-PAD '04 Proceedings of the 16th Symposium on Computer Architecture and High Performance Computing
Power emulation: a new paradigm for power estimation
Proceedings of the 42nd annual Design Automation Conference
MPARM: Exploring the Multi-Processor SoC Design Space with SystemC
Journal of VLSI Signal Processing Systems
Methodology for high level estimation of FPGA power consumption
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
MiBench: A free, commercially representative embedded benchmark suite
WWC '01 Proceedings of the Workload Characterization, 2001. WWC-4. 2001 IEEE International Workshop
The ArchC architecture description language and tools
International Journal of Parallel Programming
EURASIP Journal on Applied Signal Processing
High Level Power and Energy Exploration Using ArchC
SBAC-PAD '10 Proceedings of the 2010 22nd International Symposium on Computer Architecture and High Performance Computing
ParMiBench - An Open-Source Benchmark for Embedded Multiprocessor Systems
IEEE Computer Architecture Letters
Electronic System Level Design: An Open-Source Approach
Electronic System Level Design: An Open-Source Approach
Empirical Web server power modeling and characterization
IISWC '11 Proceedings of the 2011 IEEE International Symposium on Workload Characterization
ACCGen: An Automatic ArchC Compiler Generator
SBAC-PAD '12 Proceedings of the 2012 IEEE 24th International Symposium on Computer Architecture and High Performance Computing
| Hi-index | 0.00 |
The design complexity of integrated circuits requires techniques that automate and ease common tasks, allowing developers to keep up with the rapid growth and demand of the industry. This paper presents acSynth, an integrated framework for development and synthesis based on ArchC ADL descriptions and introduces a new power characterization method at the architectural level. The acSynth is composed of a characterization tool used to extract the energy consumption behavior of processors and also of a simulation method that, after characterization, is able to estimate software energy consumption at high speeds. Our experimental results show the power figures obtained by the characterization flow of Plasma and Leon3 processors, a MIPS-I and SPARCv8 HDL descriptions, respectively, using two different synthesis tools: Xilinx Xpower and Altera PowerPlay. The acSynth simulator used these power figures to allow power analysis at more than 35 million instructions per second in a simulation with small accuracy diversion and without loss of generality. The system executes large tests in minutes, which would otherwise take years in standard HDL methodologies.