Residue number system arithmetic: modern applications in digital signal processing
Residue number system arithmetic: modern applications in digital signal processing
Modulo Reduction in Residue Number Systems
IEEE Transactions on Parallel and Distributed Systems
The art of computer programming, volume 2 (3rd ed.): seminumerical algorithms
The art of computer programming, volume 2 (3rd ed.): seminumerical algorithms
An RNS Montgomery Modular Multiplication Algorithm
IEEE Transactions on Computers
Implementation of RSA Algorithm Based on RNS Montgomery Multiplication
CHES '01 Proceedings of the Third International Workshop on Cryptographic Hardware and Embedded Systems
Guide to Elliptic Curve Cryptography
Guide to Elliptic Curve Cryptography
A Full RNS Implementation of RSA
IEEE Transactions on Computers
A Hardware Algorithm for Modular Multiplication/Division
IEEE Transactions on Computers
An RNS implementation of an Fpelliptic curve point multiplier
IEEE Transactions on Circuits and Systems Part I: Regular Papers
Highly parallel modular multiplication in the residue number system using sum of residues reduction
Applicable Algebra in Engineering, Communication and Computing
Cox-Rower architecture for fast parallel montgomery multiplication
EUROCRYPT'00 Proceedings of the 19th international conference on Theory and application of cryptographic techniques
A high speed coprocessor for elliptic curve scalar multiplications over Fp
CHES'10 Proceedings of the 12th international conference on Cryptographic hardware and embedded systems
Systolic VLSI Arrays for Polynomial GCD Computation
IEEE Transactions on Computers
FPGA implementation of pairings using residue number system and lazy reduction
CHES'11 Proceedings of the 13th international conference on Cryptographic hardware and embedded systems
An Algorithmic and Architectural Study on Montgomery Exponentiation in RNS
IEEE Transactions on Computers
| Hi-index | 0.00 |
The paper describes a new RNS modular inversion algorithm based on the extended Euclidean algorithm and the plus-minus trick. In our algorithm, comparisons over large RNS values are replaced by cheap computations modulo 4. Comparisons to an RNS version based on Fermat's little theorem were carried out. The number of elementary modular operations is significantly reduced: a factor 12 to 26 for multiplications and 6 to 21 for additions. Virtex 5 FPGAs implementations show that for a similar area, our plus-minus RNS modular inversion is 6 to 10 times faster.