SAC '98 Proceedings of the Selected Areas in Cryptography
A Practical Implementation of the Timing Attack
CARDIS '98 Proceedings of the The International Conference on Smart Card Research and Applications
Timing Attacks on Implementations of Diffie-Hellman, RSA, DSS, and Other Systems
CRYPTO '96 Proceedings of the 16th Annual International Cryptology Conference on Advances in Cryptology
A Timing Attack against RSA with the Chinese Remainder Theorem
CHES '00 Proceedings of the Second International Workshop on Cryptographic Hardware and Embedded Systems
Power analysis attacks and countermeasures for cryptographic algorithms
Power analysis attacks and countermeasures for cryptographic algorithms
Low-Cost Solutions for Preventing Simple Side-Channel Analysis: Side-Channel Atomicity
IEEE Transactions on Computers
Improving Brumley and Boneh timing attack on unprotected SSL implementations
Proceedings of the 12th ACM conference on Computer and communications security
A refined look at Bernstein's AES side-channel analysis
ASIACCS '06 Proceedings of the 2006 ACM Symposium on Information, computer and communications security
A Unified Framework for the Analysis of Side-Channel Key Recovery Attacks
EUROCRYPT '09 Proceedings of the 28th Annual International Conference on Advances in Cryptology: the Theory and Applications of Cryptographic Techniques
Remote timing attacks are practical
Computer Networks: The International Journal of Computer and Telecommunications Networking - Web security
A generic method for secure Sbox implementation
WISA'07 Proceedings of the 8th international conference on Information security applications
Power variance analysis breaks a masked ASIC implementation of AES
Proceedings of the Conference on Design, Automation and Test in Europe
Analysis and improvement of the random delay countermeasure of CHES 2009
CHES'10 Proceedings of the 12th international conference on Cryptographic hardware and embedded systems
Mutual Information Analysis: a Comprehensive Study
Journal of Cryptology - Special Issue on Hardware and Security
Exponent blinding does not always lift (partial) spa resistance to higher-level security
ACNS'11 Proceedings of the 9th international conference on Applied cryptography and network security
Proceedings of the 13th international conference on Cryptographic hardware and embedded systems
CHES'11 Proceedings of the 13th international conference on Cryptographic hardware and embedded systems
Improved collision-correlation power analysis on first order protected AES
CHES'11 Proceedings of the 13th international conference on Cryptographic hardware and embedded systems
Compact implementation and performance evaluation of block ciphers in ATtiny devices
AFRICACRYPT'12 Proceedings of the 5th international conference on Cryptology in Africa
A statistical model for DPA with novel algorithmic confusion analysis
CHES'12 Proceedings of the 14th international conference on Cryptographic Hardware and Embedded Systems
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The timing attack (TA) is a side-channel analysis (SCA) variant that exploits information leakage through the computation duration. Previously, leakages in timing have been exploited by comparison analysis, most often thanks to "correlation - collision" or pre-characterization on a clone device. Time bias can also be used to break a secret crypto-system by linear correlations in a non-profiled setting. There is direct parallel between the Correlation Power Attack (CPA) and TA, the distinguisher being the same, but the exploited data being either vertical or horizontal. The countermeasures against such attacks consist in making the algorithm run in either random or constant time. In this paper, we show that the former is prone to high-order attacks that analyse the higher moments of the time computation during code execution. We present successful second-order timing attacks (2O-TA) based on a correlation and compare it to the second-order power attack. All experiments have been conducted on an 8-bit processor running an AES-128.