Valid Transformations: A New Class of Loop Transformations for High-Level Synthesis and Pipelined Scheduling Applications

  • Authors:
  • Minjoong Rim;Rajiv Jain

  • Affiliations:
  • Samsung, Korea;Hewlett-Packard, Westlake Village, CA

  • Venue:
  • IEEE Transactions on Parallel and Distributed Systems
  • Year:
  • 1996

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Abstract

In this paper we present a new class of loop optimizing transformations called valid transformations, which are suitable for fine-grain parallelization applications such as high-level synthesis of VLSI designs or compilers for super-scalar or VLIW machines. This class of transformations are different from existing ones in that valid transformations can be illegal. Nevertheless, if a transformation is valid, the transformed loop has a feasible pipeline schedule. We present an example valid transformation called loop expansion which can help produce cost-performance efficient designs and explore a larger design space for a satisfactory design. Several examples are used to demonstrate the efficacy of the proposed technique.